Did some reading on the full version of Siemens C167 datasheet.
There are other conditions that must be met in order to launch the BSL mode (properly).
The CPU has a "Special Operations Mode" (SMOD) which is controlled via P0L.2, P0L.3, P0L.4, P0L.5.
During hardware reset the CPU monitors signal levels on these pins (HI/LO).
For normal start mode all of the signals should be set HI during hardware reset:
P0L.2 = 1 (High)
P0L.3 = 1 (High)
P0L.4 = 1 (High) - a.k.a "the boot pin"
P0L.5 = 1 (High)
For SBL mode the signals should be set as follows (exactly what has been done during all these years):
P0L.2 = 1 (High)
P0L.3 = 1 (High)
P0L.4 = 0 (Low) - a.k.a "the boot pin"
P0L.5 = 1 (High)
The CPU sees signal being low if P0L.x -> Vss = 8k ohms (lower seems to work too).
However these two modes (normal & SBL) are the only modes that the CPU supports.
Any other P0L.2 - P0L.5 combinations can cause "undefined behaviour and should not be used" (according to the datasheet).
I made some measurements directly from the pins of the CPU and everything looks fine.
In power down mode the CPU is strapped to start in normal mode (P0L.2-5 are set to high; 4.6M - Vss).
Since this is obviously the case during power up I checked if altering the resistance between P0L.4 and Vss also alters the resistance on any other P0L.x pins, i.e pulls the low: -> Nope.
After this one was a dead-end I started tracking the pcb traces to see if there is any component which could pull any of P0L.2, P0L.3, P0L.5 signals low in case P0L.4 is being pulled low. The only chip on the PCB which has connection to all of the P0L.x signals (besides the C167 and AM29F800 flash) is the Bosch 30380 IC. This chip also has some kind of reset controlling feature for the CPU so it might well be behind all of the hassle.
Can anyone check the codes written on Bosch 30380 IC from a ECU with boot mode working properly?