This is the memory layout of the ME7.1:
0x0-0x7FFF: Internal ROM on the C167 processor
0xE000-0xFFFF: Internal RAM on the C167 processor
Found some good pictures with detailed description of these blocks content in C167CR User's Manual
The C167CR provides a total addressable memory space of 16 MBytes. This address
space is arranged as 256 segments of 64 KBytes each, and each segment is again
subdivided into four data pages of 16 KBytes each
Most internal memory areas are mapped into segment 0, the system segment. The
upper 4 KByte of segment 0 (00’F000H … 00’FFFFH) hold the Internal RAM and Special
Function Register Areas (SFR and ESFR).
The lower 32 KByte of segment 0
(00’0000H… 00’7FFFH) may be occupied by a part of the on-chip ROM/Flash/OTP
memory and is called the Internal ROM area. This ROM area can be remapped to
segment 1 (01’0000H … 01’7FFFH), to enable external memory access in the lower half
of segment 0, or the internal ROM may be disabled at all.
Code and data may be stored in any part of the internal memory areas, except for the
SFR blocks, which may be used for control/data, but not for instructions.
The C167CR may reserve an address area of variable size (depending on the version)
for on-chip mask-programmable ROM/Flash/OTP memory (organized as X × 32). The
lower 32 KByte of this on-chip memory block are referred to as “Internal ROM Area”.
Internal ROM accesses are globally enabled or disabled via bit ROMEN in register
SYSCON. This bit is set during reset according to the level on pin EA, or may be altered
via software. If enabled, the internal ROM area occupies the lower 32 KByte of either
segment 0 or segment 1 (alternate ROM area). This mapping is controlled by bit ROMS1
in register SYSCON.
